-
AI-Enhanced Multimodal Approaches for Electronics Metrology and Failure Analysis
Virtual: https://events.vtools.ieee.org/m/498529The rapid growth of 3D advanced packaging introduces new challenges in inspection and failure analysis, where complex structures such as microbumps, redistribution layers (RDLs), and through-silicon vias (TSVs) demand reliable non-destructive testing (NDT). Conventional approaches, including Scanning Acoustic Microscopy (SAM) and X-ray imaging, are limited by noise, resolution, and defect visibility, creating barriers for reproducible and scalable analysis. To address these challenges, our work advances an AI-powered multimodal inspection framework that couples physics-informed machine learning with structured data infrastructure. A Physics-Informed Neural Network (PINN) approach enhances SAM imaging by embedding acoustic wave physics into reconstructions, producing higher-fidelity images validated through structural similarity and physical accuracy metrics. Complementing this, multimodal data fusion across SAM, X-ray laminography, optical microscopy, and CT establishes richer defect detection and cross-validation. Central to this effort is the creation of multimodality benchmark datasets built on standardized acquisition protocols, structured metadata schemas, and annotation pipelines. These datasets provide not only a foundation for AI model training but also enable reproducibility, traceability, and interoperability across future programs. Speaker(s): Navid Asadi, Virtual: https://events.vtools.ieee.org/m/498529
-
Stability & Biasing in mmWave GaAs/GaN PAs: Challenges and Solutions
Room: 4021, Bldg: Sobrato Campus for Discovery and Innovation, Santa Clara University, 500 El Camino Real, Santa Clara, California, United States, 95054, Virtual: https://events.vtools.ieee.org/m/505939Millimeter-wave (mmWave) power amplifiers (PAs) are critical building blocks in next-generation radar, satellite, defense, and 6G communication systems, where output power, bandwidth, and efficiency must be achieved under stringent size, weight, and power (SWaP) constraints. Among the enabling technologies, Gallium Arsenide (GaAs) and Gallium Nitride (GaN) continue to dominate due to their complementary strengths in linearity, noise performance, and high-power density. This talk will focus on design considerations unique to mmWave GaAs and GaN PAs, with particular emphasis on stability and biasing challenges at frequencies above 20 GHz. Unlike lower microwave designs, mmWave PAs are highly susceptible to low-frequency oscillations, odd-mode instabilities, and bias-induced resonances. To mitigate these, stability networks—ranging from RC shunt loading and resistive feedback to series loading and quarter-wave stabilization—must be co-optimized with matching and biasing schemes. Special attention will be given to the integration of stability networks with bias networks, where parasitics from bias chokes, decoupling capacitors, and high-impedance bias lines can introduce additional poles/zeros in the response, affecting both gain flatness and unconditional stability. The presentation will review practical approaches to stabilizing mmWave PAs without compromising efficiency or bandwidth, including the use of lossy transmission lines, broadband bias tees, and RC filtering strategies tailored for GaAs vs. GaN processes. Case studies will illustrate how bias network design impacts stability margins and overall PA performance, and how distributed versus lumped stabilization choices evolve with frequency. The session will conclude with a discussion of packaging and integration considerations, where bondwire inductances, via transitions, and LTCC/SiP bias routing play a defining role in amplifier stability at mmWave frequencies. Speaker(s): Asmita Dani, Room: 4021, Bldg: Sobrato Campus for Discovery and Innovation, Santa Clara University, 500 El Camino Real, Santa Clara, California, United States, 95054, Virtual: https://events.vtools.ieee.org/m/505939
-
IEEE Symposium on Reliability for Electronics and Photonics Packaging
Milpitas, California, United States, Virtual: https://events.vtools.ieee.org/m/495693[]This symposium will focus on quantified reliability, accelerated testing and probabilistic assessments of the useful lifetime of electronic, photonic, MEMS and MOEMS materials, assemblies, packages and systems in electronics and photonics packaging. This includes failure modes, mechanisms, testing schemes, accelerated testing, stress levels, and environmental stresses. Registration is now open. Visit our website for details, for our Advance Program, and to register. https://attend.ieee.org/repp. Milpitas, California, United States, Virtual: https://events.vtools.ieee.org/m/495693
-
Characterization and Application of a New Chip-Level Air Pump
Virtual: https://events.vtools.ieee.org/m/500418[]Trends in consumer goods are leaning towards thinner, more compact products with higher performance than their predecessors. Today’s consumer wants lightweight, portable, battery-operated gear that is powerful enough to satisfy their needs for speed and ease of use. One of the biggest challenges facing product design is thermal management. Case temperature limits for products that come in contact with user’s skin place constraints on internal power dissipation and increase the need for improved thermal management. With the introduction of locally processed AI and higher compact portable device processing loads thermal issues are critical for avoiding throttling. µCooling: A new device has been invented that changes the way thermal engineers are approaching system cooling design. µCooling is a new concept in air movers. It is small, and thin and is a complete departure from rotating mass fans. This MEMS-based invention can move air through very small spaces, used directly on a chip or package, placed remotely through tiny ducts, or mounted outside of a product. In fact, the versatility of µCooling changes the way we can manage heat at the package, SoC, or bare-chip level. This talk will introduce µCooling, a MEMS-based, all-silicon, micro-sized air pump. The device will be described in terms of how it works, performance characteristics, and application examples. Speaker(s): Tom Tarter, Virtual: https://events.vtools.ieee.org/m/500418
-
AI for Thermal Management of Electronic Systems: A Pathway to Digital Twins
Virtual: https://events.vtools.ieee.org/m/504510[]The rapid rise in power density and complexity of electronic systems has made thermal management a critical challenge for ensuring reliability, performance, and sustainability. Artificial Intelligence (AI) offers transformative opportunities to address this challenge by enabling data-driven modeling, optimization, and predictive control of cooling systems. By integrating AI with experimental and physics-based approaches, adaptive models can be developed to capture transient thermal behaviors, and optimize system-level energy efficiency. This forms the foundation for digital twins, virtual replicas that continuously interact with their physical counterparts to provide system specific real-time monitoring, and data driven decision support. In this talk, I will present recent and ongoing research activities at ES2 Binghamton on AI-enabled thermal management design, with emphasis on cooling solutions for high-power chips in data centers. I will further highlight how these developments serve as a pathway towards creating digital twins, dynamic virtual replicas that integrate real-time data, physics, and AI to enable system-level monitoring, prediction, and optimization. Together, these advancements pave the way for reliable, energy-efficient, and sustainable electronic systems. Speaker(s): Srikanth Rangarajan, Virtual: https://events.vtools.ieee.org/m/504510
-
Digital Lithography: Addressing Scaling Challenges in Advanced Packaging
Virtual: https://events.vtools.ieee.org/m/502777[] Requirements on the high-performance compute (HPC) systems from AI workloads necessitates transition to larger package sizes with 2.5D to 3.5D integration and density scaling at every level in the stack. Several competing packaging architectures are emerging to solve the compute and power efficiency challenge presented by AI workloads. Each presents unique lithography challenges such as >100×100 field size, large chip placement deviations, fine lines and tight overlay warped substrates. The conventional lithography tools are incapable of meeting all the requirements to achieve scaling. The talk will preview Applied Materials’ Digital Lithography Technology (DLT) which enables highest resolution at production throughputs while ensuring CD uniformity and overlay accuracy across the entire panel. Speaker(s): Niranjan Khasgiwale, Virtual: https://events.vtools.ieee.org/m/502777
6 events found.