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In response to the drought intensified wildfire risk in PG&E’s service territory, PG&E has developed the Enhanced Powerline Safety Settings (EPSS) program as an additional layer of protection to reduce wildfire ignition risk. In 2021, PG&E began to pilot these new safety settings and has since seen a significant reduction in California Public Utilities Commission reportable-ignition. In 2022, the program was expanded to all circuits within the high fire risk areas of the service territory. In this presentation, we will cover the program overview, the technical background, how we continue to improve the effectiveness and highlight the opportunities we are taking to improve reliability and reduce customer impact. AGENDA: 11:30 am - Noon Lunch & Networking (In-Person) Noon - 1:00 pm PG&E EPSS Technical Presentation (Zoom Start at Noon) In-Person includes optional lunch provided by IEEE PES SF Chapter. Lunch is free for IEEE members & $5 for non-members. Pay on-site. Speaker(s): James Tuccillo, Dave Canny, Room: Courtyard Room, Bldg: CPUC, 505 Van Ness Ave, San Francisco, California, United States, 94102, Virtual: https://events.vtools.ieee.org/m/371823 |
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Abstract: Both video compression and computer vision make use of spatial and temporal patterns present in images. With the rise of the internet of video things, numerous opportunities have arisen for synergizing AI and video compression. In this presentation, we will explore two main aspects. Firstly, we'll delve into utilizing compressed data to perform AI tasks. Secondly, we'll dive into harnessing AI for video compression and image signal processing. Bio: Dr. Yen-Kuang Chen received his Ph.D. degree from Princeton University. His research areas span from emerging applications that can utilize the true potential of multimedia and Internet of Things (IoT) to computer architecture that can embrace emerging applications. He has 100+ patents and 100+ technical publications. He is recognized as an IEEE Fellow for his contributions to algorithm-architecture co-design for multimedia signal processing. Speaker(s): Yen-Kuang Chen, Room: 1301, Bldg: SCDI, Santa Clara University, Santa Clara, California, United States |
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Free Registration: https://www.eventbrite.com/e/ieee-day-panel-discussion-on-ethical-ai-shaping-the-future-responsibly-tickets-682596904717 Speaker(s): Dr. Ruchi Dass, Vishnu S. Pendyala, Dr. Koerner, Chinmay, Meenakshi Jindal Virtual: https://events.vtools.ieee.org/m/367620 |
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Less than one year after its release, ChatGPT is already very popular with the public at large, but how much of it is hype? How useful is it, really? In the business context, how should managers view it? And react to it? This month we will look into the phenomenon unleashed by this large language model-based chatbot. To shed light on this topic, we have curated several short videos to pose the problem, and to showcase different perspectives on the potential uses of Generative AI in the business world. After each video, we will pause to discuss our own experiences and insights relative to the presented ideas. The meeting will be facilitated by our TEMS Chapter Chair, Edmund Cheng, and past-Chair, Carl Angotti. We look forward to your active participation and engaging discussions on this exciting topic! Speaker(s): Edmund Cheng, Carl Angotti Virtual: https://events.vtools.ieee.org/m/376284 |
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Fall 2023 Engineering in Medicine and Biology (EMBS) Technical Meeting jointly sponsored by Metro LA section and Santa Clara Valley Section. Featuring distinguished guest speaker Dr. Christian Dameff to discuss cybersecurity in healthcare. Please register on vTools to attend, or email [email protected] with any questions. This is a virtual event. The WebEx link will be available on event page after registering. Speaker bio: Dr. Christian Dameff is an Emergency Physician, Clinical Informaticist, and researcher. Published clinical works include post cardiac arrest care including therapeutic hypothermia, novel drug targets for acute myocardial infarction patients, ventricular fibrillation waveform analysis, cardiopulmonary resuscitation (CPR) quality and optimization, dispatch assisted CPR, teletoxicology, clinical applications of wearables, and electronic health records. Dr. Dameff is also a hacker and security researcher interested in the intersection of healthcare, patient safety, and cybersecurity. He has spoken at some of the world’s most prominent hacker forums including DEFCON, RSA, Blackhat, Derbycon, BSides: Las Vegas, and is one of the cofounders of the CyberMed Summit, a novel multidisciplinary conference with emphasis on medical device and infrastructure cybersecurity. Published cybersecurity topics include hacking 911 systems, HL7 messaging vulnerabilities, and malware. Agenda: Metro LA Section Vice Chair Dr. Sulekha Chattopadhyay will introduce the session and discuss benefits of IEEE EMBS membership Metro LA Section Chair Dr. Alexander Klonoff will introduce guest speaker Dr. Dameff Dr. Christian Dameff will deliver a presentation on cybersecurity in healthcare Q&A to follow Virtual: https://events.vtools.ieee.org/m/376134 |
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5:30: Food and Refreshment/Social 6:15: Chapter Administrative and Presentation start Advanced Driver Assistance Systems (ADAS) have become an ubiquitous feature on almost all new vehicles. With the development of any new test, there is the process of first determining the purpose of the test by identifying known and potential vulnerabilities, then finding effective ways of exercising and verifying performance. The systems employed in providing ADAS use several technologies, some of which are relatively new to EMC testing methods. This talk discusses the details of traditional EMC testing and the adaptation of some of these to meet the needs of adequately exercising ADAS related features, and the special considerations associated with testing safety systems that are integral to a driver’s safe operation of a vehicle Speaker(s): Garth D'Abreu, Agenda: 5:30: Food and Refreshment/Social 6:15: Chapter Administrative and Presentation start 1120 Fulton Pl, Fremont, California, United States, 94539
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This event will be available live at SEMI, as well as over Zoom. Get to SEMI by 6:30pm to network – and enjoy great pizza and refreshments! All attendees MUST register using the Eventbrite form (see link). A Deepfake is a photo, video, or audio file that has been digitally altered or created to misrepresent or enhance reality. If AI is trained to detect Deepfakes, of course the detection can only be as good as the suitability of the training data set for the challenge it is facing during inference. At the stage of inference, the AI uses the weights calculated during training to predict Deepfakes. While working for Reality Defender, and while working closely with its Chief Defender, speaker Benjamin Mencer learned how hard it is to detect Deepfakes even using machine learning. Since the term was coined in 2017, Deepfakes have improved to the point where we may no longer be able to tell the difference between fakes and reality. In this talk, Benjamin Mencer will describe some consequences of Deepfake technology, as well as new challenges that are arising. He will also describe challenges and solutions to the problems that one may encounter during detection training and inference. Finally, he will give examples of both the risks and the opportunities associated with Deepfakes as they create a space for new advancements in society. Speaker(s): , Benjamin Mencer 567 Yosemite Dr, Milpitas, California, United States, 95035, Virtual: https://events.vtools.ieee.org/m/374816 |
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Spin-Transfer-Torque MRAM was invented at IBM by John Slonczewski in the early 1990s. By using a spin-polarized current, instead of a magnetic field, to write a magnetic free layer in a magnetic tunnel junction, the required write current naturally decreases with area, providing attractive technology scaling. The discovery of high magnetoresistance in MgO tunnel barriers at IBM by Stuart Parkin, and later independently by Shinji Yuasa, enabled sufficient read signal to efficiently read magnetic tunnel junctions. The discovery of perpendicular magnetic anisotropy in thin CoFeB/MgO layers at IBM and independently by Tohoku University enabled a dramatic reduction in the switching current, and opened the way to practical perpendicular magnetic tunnel junctions for dense Spin-Transfer-Torque MRAM. This talk will provide an overview of Spin-Transfer-Torque MRAM, including the three basic building blocks described above. I’ll give an introduction to the basic physics of spin-transfer torque and applications of Spin-Transfer-Torque MRAM. Then I will review why perpendicular magnetic anisotropy is advantageous for MRAM compared to in-plane anisotropy, and the materials challenges of perpendicular anisotropy. I will discuss the research at IBM in 2009 that led to our discovery of perpendicular anisotropy in thin CoFeB/MgO layers, and our use of these layers to make the first practical perpendicular magnetic tunnel junctions and the first demonstration of reliable writing in Spin-Transfer-Torque MRAM. Finally I will review our recent results on methods to lower the switching current of Spin-Transfer-Torque MRAM by using optimized magnetic materials and double magnetic tunnel junctions, including our recent demonstration of reliable 250 ps switching. Speaker(s): Dr. Worledge, Bldg: Quadrant, 1120 Ringwood Ct., San Jose, California, United States, 95131, Virtual: https://events.vtools.ieee.org/m/371928 |
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Minimizing Iq is a key factor in managing battery life and enabling energy harvesting solutions. An Internet-of-Things (IoT) sensor node is one of the best examples of why it's important to minimize Iq. Because these types of systems spend the majority of their time (>99%) in standby mode, the Iq in standby mode tends to be the limiting factor for battery life and utilizing energy harvesting techniques. Careful optimization of low-Iq power management blocks makes it possible to extend battery life from two years to more than ten years. Recent breakthroughs have been achieved in reducing Iq <60nA for power management building blocks such as DC/DC converters, power switches, low-dropout regulators (LDOs) and supervisors without the classical trade-offs . More importantly, this presentation will highlight some of the pitfalls to avoid and remaining challenges on the journey to achieving lower Iq. Speaker(s): , Keith Kunz Virtual: https://events.vtools.ieee.org/m/374573 |
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Photonic integrated circuit technology (silicon photonics) is used for many applications including optical data communications, optical and quantum computing, and sensing including LiDAR, biomedical and environmental. A major packaging challenge facing the industry is optical coupling between multiple integrated photonic components together with low insertion loss, in a cost effective manner, into a package suitable for commercialization. A promising approach is to create “photonic wire bonds” (PWBs), namely optical waveguides that look similar to conventional electrical wire bonds. PWBs are a high-yield, low-insertion-loss, and high-throughput versatile method of packaging photonic components such as chip-to-fiber and laser-to-chip interconnects. Utilizing two-photon polymerization to fabricate freeform 3D polymer structures, PWBs can connect components with arbitrarily disparate mode field shapes and sizes. Capabilities and advantages of the PWB technique include: gain chip integration with existing ’known good die’, dense optical I/O connections to the chip, scalability from prototyping to high-volume, and interconnects that are not possible with other standard photonic packaging techniques. Speaker(s): Lukas Chrostowski, Virtual: https://events.vtools.ieee.org/m/372682
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Title: Millimeter-wave Reconfigurable Intelligent Surfaces for 5G and Future Wireless Communications Abstract: Millimeter-waves (mmWaves, 30-300 GHz) cover much shorter distances than the sub-6GHz signals due to absorption and/or strong scattering from most materials in a typical communication channel. As such, it is very common for the user equipment (UE) to receive unacceptably low signal-to-noise (SNR) signals or experiencing no coverage at all. Densifying the base station (BS) network is an approach that will improve signal coverage, this comes at a substantial capital expenditure due to the costs associated with the hardware, installation, and maintenance of such complicated systems. Alternatively, passive reconfigurable intelligent surfaces (RISs) are potential solutions to the mmWave coverage challenges and have attracted great interest in the recent years from both academia and industry. RISs are low cost, low profile planar devices capable of redirecting incident mmWaves to a desirable direction(s) without generating an RF power (passive) thus being potentially ultra-low power systems. In this presentation, I will provide a brief background for the RIS circuits and systems, review relevant prior work, and present our proposed and fabricated RIS designs. I will also discuss the deployment of RISs in real-world wireless communication scenarios. The talk will end with potential future RIS architectures and new sensing and imaging applications. Biography: Georgios Trichopoulos received the Diploma degree in electrical and computer engineering from the Democritus University of Thrace, Xanthi, Greece, in 2004, the M.S. degree in biomedical engineering from the National Technical University of Athens and University of Patras, Greece (under a joint program), in 2006, and the Ph.D. degree in electrical and computer engineering from The Ohio State University, Columbus, OH, USA, in 2013. From 2013 to 2015, he was a Postdoctoral Researcher with the ElectroScience Laboratory, The Ohio State University. His research areas include electromagnetic theory, terahertz imaging, antenna design for millimeter-wave and terahertz sensors, and high-frequency reconfigurable metasurfaces. He is currently an Associate Professor with the School of Electrical, Computer, and Energy Engineering, Arizona State University, Tempe, AZ, USA. Dr. Trichopoulos has been the recipient of several awards, including the Best Student Paper Award of the 2013 IEEE Antennas and Propagation Symposium and 2019 NSF CAREER Award. Virtual: https://events.vtools.ieee.org/m/377668 |
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8:00 am to 4:30 pm. Learn from NVIDIA, NASA, Vertiv, Cloudflare, Volt Server, and EdgeCloudLink why deployment of AI and High-Performance Computing in data centers is revolutionizing Data Center design, and how these and other industry leaders are solving these challenges. Breakfast will be available beginning 7:30 am. Room: Saratoga Ballroom, Bldg: Delta Hotel by Marriott, 2151 Laurelwood Road, Santa Clara, California, United States, 95054
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The Electron Devices Society Santa Clara Valley/San Francisco joint Chapter is hosting Prof. Meenakshi Singh. The title of the lecture is ‘Investigating quantum speed limits with superconducting qubits’ When: Friday, Oct. 20, 2023 – 9am to 10am (PDT) Where: This is an online event and attendees can participate via Zoom. Registration: Send an email to hiuyung.wong at ieee.org to get the zoom link indicating if you are IEEE member, IEEE EDS member, IEEE Student member Contact: hiuyung.wong at ieee.org Speaker: Prof. Meenakshi Singh Abstract: The speed at which quantum entanglement between qubits with short range interactions can be generated is limited by the Lieb-Robinson bound. Introducing longer range interactions relaxes this bound and entanglement can be generated at a faster rate. The speed limit for this has been analytically found only for a two-qubit system under the assumption of negligible single qubit gate time. We seek to demonstrate this speed limit experimentally using two superconducting transmon qubits. Moreover, we aim to measure the increase in this speed limit induced by introducing additional qubits (coupled with the first two). Since the speed up grows with additional entangled qubits, it is expected to increase as the system size increases. This has important implications for large-scale quantum computing. Speaker Bio: Dr. Singh is an experimental physicist with research focused on quantum thermal effects and quantum computing. She graduated from the Indian Institute of Technology with an M. S. in Physics in 2006 and received a Ph. D. in Physics from the Pennsylvania State University in 2012. Her Ph. D. thesis was focused on quantum transport in nanowires. She went on to work at Sandia National Laboratories on Quantum Computing as a post-doctoral scholar. She is currently an Associate Professor in the Department of Physics at the Colorado School of Mines. At Mines, her research projects include measurements of spin-orbit coupling in novel materials and thermal effects in superconducting hybrids. She recently received the NSF CAREER award to pursue research in phonon interactions with spin qubits in silicon quantum dots. Speaker(s): Prof. Meenakshi Singh Agenda: The Electron Devices Society Santa Clara Valley/San Francisco joint Chapter is hosting Prof. Meenakshi Singh. The title of the lecture is ‘Investigating quantum speed limits with superconducting qubits’ When: Friday, Oct. 20, 2023 – 9am to 10am (PDT) Where: This is an online event and attendees can participate via Zoom. Registration: Send an email to hiuyung.wong at ieee.org to get the zoom link indicating if you are IEEE member, IEEE EDS member, IEEE Student member Contact: hiuyung.wong at ieee.org Speaker: Prof. Meenakshi Singh Abstract: The speed at which quantum entanglement between qubits with short range interactions can be generated is limited by the Lieb-Robinson bound. Introducing longer range interactions relaxes this bound and entanglement can be generated at a faster rate. The speed limit for this has been analytically found only for a two-qubit system under the assumption of negligible single qubit gate time. We seek to demonstrate this speed limit experimentally using two superconducting transmon qubits. Moreover, we aim to measure the increase in this speed limit induced by introducing additional qubits (coupled with the first two). Since the speed up grows with additional entangled qubits, it is expected to increase as the system size increases. This has important implications for large-scale quantum computing. Speaker Bio: Dr. Singh is an experimental physicist with research focused on quantum thermal effects and quantum computing. She graduated from the Indian Institute of Technology with an M. S. in Physics in 2006 and received a Ph. D. in Physics from the Pennsylvania State University in 2012. Her Ph. D. thesis was focused on quantum transport in nanowires. She went on to work at Sandia National Laboratories on Quantum Computing as a post-doctoral scholar. She is currently an Associate Professor in the Department of Physics at the Colorado School of Mines. At Mines, her research projects include measurements of spin-orbit coupling in novel materials and thermal effects in superconducting hybrids. She recently received the NSF CAREER award to pursue research in phonon interactions with spin qubits in silicon quantum dots. Virtual: https://events.vtools.ieee.org/m/377193 |
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This Workshop is organized and run by three Silicon Valley IEEE chapters: Circuits and Systems; Electron Devices; and Electronics Packaging, with support from the Computer Chapter. The intent is to bring together engineers of electrical, mechanical, materials and computer science disciplines and physicists to describe the state-of-the-art in all the interconnected fields and the opportunities and challenges for future generations of quantum computers. (https://attend.ieee.org/qc-dcep/) for a listing of the outstanding presenters from around the world and titles of their technical presentations. On-site seating is limited; WebEx attendance is available. SEMI World Headquarters, 673 South Milpitas Blvd., Milpitas, California, United States, 95035, Virtual: https://events.vtools.ieee.org/m/372629 |
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Semiconductor microelectronic chips are critical components in defense C4ISR and weapon systems. Department of Defense (DoD) needs to have an assured supply of advanced microcroelectronic chips, in peacetime and wartime. Since DoD itself normally does not make the chips, DoD depends on the semiconductor industry to produce the needed chips. DoD uses a variety of chips, many are commercial-off-the-shelf (COTS) and some are classified and defense-unique chips. The semiconductor industry, although originally created by DoD, for several decades has gradually moved off-shore, including fabrication, testing, and packaging. The U.S. market share of global semiconductor manufacturing capacity has fallen from about 38% in 1990 to 12% in 2020. TSMC in Taiwan is the world’s largest semiconductor chip manufacturer, supplying 92% of worlds sub-nanometer advanced chips. To bring semiconductor manufacturing back to the U.S., Congress passed the CHIPS and Science Act to reshore semiconductor manufacturing to the U.S. The CHIPS Act authorizes more than $200B, and immediately appropriates $53.7B, in federal funding to promote domestic semiconductor manufacturing production, DoD allocated $2B as a part of the CHIPS Act. DoD's Microelectronics Commons initiative selected eight regional innovations hubs that include a large number of members in the industrial base. The objective of these hubs, called “lab to fab”, is to speed up the transition of microelectronics from research to prototyping to production, and is focused on strengthening the defense microelectronics industrial base. Speaker(s): Dr. Clifford Lau, Room: Auditorium, Bldg: Arlington Central Library, 1015 North Quincy Street, Arlington, Virginia, United States, Virtual: https://events.vtools.ieee.org/m/376101 |
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The lithium-ion battery (LIB) features structural and chemical complexities across a broad range of length scales. An in-depth understanding of the battery function, degradation, and failure mechanisms requires a thorough investigation from the structural, chemical, mechanical, and dynamic perspectives. In this talk, I present a macro-to-nano zoom through the hierarchy of a standard battery cell using a suite of state-of-the-art X-ray characterization techniques. Damage, deformation, and heterogeneity at different length scales are visualized and are associated to different degradation phenomena and mechanisms. Our results highlight the importance of the cathode material’s mechanical properties, which could significantly impact both immediate and long-term cell behaviors. Going beyond battery research, I will also briefly discuss the application of X-ray characterization tools for applications in the semiconductor industry and in electronic device packaging. Speaker(s): Yijin Liu, Virtual: https://events.vtools.ieee.org/m/366159
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Join us to celebrate successes and wins as we highlight how California IEEE organizations are broadening their professional and educational outreach. Kathleen A. Kramer, Cal Tech PhD, currently professor of Electrical Engineering at the University of San Diego, will be our featured speaker at 6PM to highlight success stories, particularly with San Diego outreach activities such as Expand Your Horizons, FIRST LEGO League and the FIRST Technical Challenge. Kathleen will be followed a panel of Bay Area and Silicon Valley IEEE leaders, and will discuss with them their challenges and achievements in creating diverse groups and sustaining energy, given the many obstacles over the past 3 years. Jerry Chang Larry Moody Jacqueline Radding Peter Fischer Pizza and beverages will be served from 5:15-6PM prior to the event. Parking on campus is $2 per hour and $10 per day, see below for parking instructions and map. Speaker(s): , , , , Agenda: 5:15 PM-6:00PM - Socializing and Pizza 6:00PM-6:30PM - Speaker - Kathleen Kramer 6:30PM-7:00PM - Panelists/Kathleen Discussion 7:00PM-7:30PM - Q&A Objectives: - Leverage success stories to help build excitement among our existing and future leadership - Identify “Wins” that we can use as models to copy or expand upon - Discuss the use of metrics regarding successes in different areas such as STEM or member engagement at different entities like Chapters and to show how DEI has helped groups accomplish goals using the Situation-Action-Results (SAR) framework. - Talk about what worked and what didn’t in various initiatives Room: Multi-purpose room A (MPR-A), Bldg: New University Union (New UU), Cal State University East Bay, 25800 Carlos Bee Blvd, Hayward, California, United States, 94542, Virtual: https://events.vtools.ieee.org/m/373315 |
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Heterogeneous Integration poses several significant challenges for thermal management at multiple length scales ranging from heat extraction from hot spots, heat transfer through multiple layers of materials, different target temperatures for specific devices/materials, to heat rejection to a system cooling solution or the ambient. This applies to system-in-packages, including 2D, 2.5D, and 3D subsystems and the special needs of photonic devices. We need to consider the various thermal paths within packages to dissipate the generated heat, how to apply modeling and simulation, and advanced cooling methods including conduction, liquid cooling, heat pipes, and more exotic designs. It is important to identify and develop a detailed understanding of the capabilities and limitations of key thermal technologies that meet or exceed these demands so that they are available well in advance of need and can be implemented if they meet integration cost envelopes. We will consider three areas for thermal management: Die level; Package integration/System-in-Package (SIP)/module level; and System level. We will focus on emerging challenges and opportunities for thermal modeling of advanced 3D IC systems; challenges and characterization of hotspot modeling; thermal modeling for High Bandwidth Memory (HBM) and integrated voltage regulators; and innovative methods for manufacturing silicon microchannels. Then, we will consider an advanced design example. Sustainable and efficient operation of US data centers, currently consuming ~100 billion kWh/year, requires transformative and innovative technologies. Nearly 20% of the total power is used to run the data center refrigeration cooling infrastructure, which is extremely sensitive to climate and environmental conditions. The ever-increasing prevalence of higher-power processors aggravates cooling/energy challenges. It is expected that reducing the thermal resistance of the device junction to coolant by 10×, will pave the way for elimination of refrigeration cooling systems, resulting in considerable energy saving in the data centers. In the case of two-phase flow, flow instability and large superheat are major concerns that must be addressed: pressure drop, hotspot cooling, larger chip areas, and liquid films on heat walls. The enhanced cooling IceCool Fundamentals initiative by DARPA, and several ARPA-e recent initiatives, resulted in development of a series of remarkable thermal management solutions for very challenging performance metrics targets. Speaker(s): Tiwei Wei, Mehdi Asheghi, Virtual: https://events.vtools.ieee.org/m/375984 |
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