[]As AI and machine learning continue to advance rapidly, the demand for GPU and data center connectivity is escalating. Silicon photonics is emerging as a transformative solution for optical interconnects, offering cost-effective, high-volume optical interconnect solution. Current electrical and optical interconnect struggle to meet the power demand and connectivity driven by the needs of AI and cloud computing. At the LSIP group within Hewlett Packard Labs, we are focused on delivering low-power optical links capable of reaching beyond 1.6Tb/s transmission with 200+ Gb/s per lane. In this presentation, I will discuss our efforts in developing high speed silicon photonics optical interconnects, including utilizing high speed Si(Ge) avalanche photodiodes to realize energy efficient optical links. Speaker(s): Zhihong Huang, Virtual: https://events.vtools.ieee.org/m/435507

Recent progress in three-dimensional (3D) integration offers a unique opportunity to integrate low-dimensional semiconductors in a vertically stacked system for 3D integrated circuits. In this talk, we will discuss modeling, simulation, and design of two-dimensional (2D) semiconductors and semiconductor quantum dots to enable neuromorphic and quantum computing functionalities in an integrated system. A multiscale simulation approach is employed to model the stochastic switching characteristics of 2D-semiconductor-based devices for Boltzmann machines, facilitating efficient solutions to optimization problems. Furthermore, technology computer-aided design (TCAD) offers valuable insights into operation principles, quantum noise limitations, and quantum gate performance for semiconductor spin-based quantum computing applications." Bio: Jing Guo is currently a professor in the Department of Electrical and Computer Engineering at the University of Florida, Gainesville, FL, USA. His research work mainly focuses on modeling, simulation, and design of nanoscale electronic devices. His group has extensively explored device physics, assessed performance potentials, and developed new device concepts for nanoscale transistors based on carbon nanotubes, graphene, 2D materials and topological insulators, and memory cells based on ferroelectric materials. His group has developed efficient simulation methods for quantum-transport-based device simulations, and physics-based models for nanoscale transistors. He has also developed and contributed to some widely used simulation tools deployed on the nanoHUB, such as CNTbands. He served in the technical program committee of the International Device Research Meeting (IEDM) and Device Research Conference (DRC). He also serves as an associate editor of Nano-Micro Letters. He coauthored a book “Nanoscale Transistors: Device Physics, Modeling, and Simulation.” Published by Springer. Virtual: https://events.vtools.ieee.org/m/448712