SMART Power Flow Controllers – A Necessity for Future Power Grid

Bldg: Courtyard Room, 505 Van Ness Ave, San Francisco, California, United States, 94102, Virtual: https://events.vtools.ieee.org/m/414343

Power flow control techniques have been practiced, from using inductors, capacitors, transformers and load tap changers in the earlier days of electrical engineering to power electronics-based solutions in recent years. Even though the costs and complexities of the available solutions vary widely, the basic underlying theory of power flow control is still the same as it has always been. The question is which solution one should employ. The answer depends on knowing what the true need is. The power industry’s pressing need for the most economical ways to transfer bulk power along a desired path may be met by building new transmission lines, which is a long and costly process. Alternately, it may be quicker and cheaper to utilize the existing transmission lines more efficiently. The key is to identify the underutilized transmission lines and harness their dormant capacities to increase the power flows to the lines’ thermal limits using the most cost-effective and time-tested solutions. Two reference books are as follows. - Introduction to FACTS Controllers: Theory, Modeling, and Applications (ISBN: 978-0-470-47875-2), IEEE Press and John Wiley & Sons, Inc. 2009 - Power Flow Control Solutions for a Modern Grid using SMART Power Flow Controllers (ISBN: 978-1-119-82435-0), IEEE Press and John Wiley & Sons, Inc., 2022. Speaker(s): Kalyan Sen, Bldg: Courtyard Room, 505 Van Ness Ave, San Francisco, California, United States, 94102, Virtual: https://events.vtools.ieee.org/m/414343

Large Language Models and Generative AI for High Performance Systems

Room: SCDI 3301, Bldg: Sobrato Campus for Discovery and Innovation, 500 El Camino Real, Santa Clara, California, United States, 95053, Virtual: https://events.vtools.ieee.org/m/420026

Speaker: Chris Cheng, Distinguished Technologist, Hewlett Packard Enterprise Abstract: Generative AI and Large language models (LLM) with domain knowledge enhancements will fundamentally change the way we design hardware. In this talk we will start with the basic concept of transformer with encoder and decoder. We will discuss how domain knowledge can be injected into LLM through retrieval augmented generation (RAG) and fine tuning. We will also discuss the concept of LLM agent where complex design tasks can be done by the agent through planning, action with other tools and reasoning. An even more advanced technique will involve the LLM optimizing a design through optimization by prompt. We will conclude with the concept of foundational models for signal integrity and power integrity as an example of how we can tie LLM and Generative AI to complete a complex engineering design task. Speaker Bio: Chris Cheng is a Distinguished Technologist at the Storage Division of Hewlett-Packard Enterprise. He is responsible for managing all high speed, analog/mixed signal designs and hardware machine learning development within the Storage Division. He also held senior engineering positions in SUN Microsystems where he developed the original GTL system bus with Bill Gunning. He was a Principal Engineer in Intel where he led high speed processor bus design team. He was the first hardware engineer in 3PAR and guided their high-speed design effort until it was acquired by Hewlett Packard. Room: SCDI 3301, Bldg: Sobrato Campus for Discovery and Innovation, 500 El Camino Real, Santa Clara, California, United States, 95053, Virtual: https://events.vtools.ieee.org/m/420026